Hardware implementation of memristor-based artificial neural networks.

Artificial Intelligence (AI) is currently experiencing a bloom driven by deep learning (DL) techniques, which rely on networks of connected simple computing units operating in parallel. The low communication bandwidth between memory and processing units in conventional von Neumann machines does not support the requirements of emerging applications that rely extensively on large sets of data. More recent computing paradigms, such as high parallelization and near-memory computing, help alleviate the data communication bottleneck to some extent, but paradigm- shifting concepts are required. Memristors, a novel beyond-complementary metal-oxide-semiconductor (CMOS) technology, are a promising choice for memory devices due to their unique intrinsic device-level properties, enabling both storing and computing with a small, massively-parallel footprint at low power. Theoretically, this directly translates to a major boost in energy efficiency and computational throughput, but various practical challenges remain. In this work we review the latest efforts for achieving hardware-based memristive artificial neural networks (ANNs), describing with detail the working principia of each block and the different design alternatives with their own advantages and disadvantages, as well as the tools required for accurate estimation of performance metrics. Ultimately, we aim to provide a comprehensive protocol of the materials and methods involved in memristive neural networks to those aiming to start working in this field and the experts looking for a holistic approach.

High-performance van der Waals antiferroelectric CuCrP2S6-based memristors.

Layered thio- and seleno-phosphate ferroelectrics, such as CuInP2S6, are promising building blocks for next-generation nonvolatile memory devices. However, because of the low Curie point, the CuInP2S6-based memory devices suffer from poor thermal stability (<42 °C). Here, exploiting the electric field-driven phase transition in the rarely studied antiferroelectric CuCrP2S6 crystals, we develop a nonvolatile memristor showing a sizable resistive-switching ratio of ~ 1000, high switching endurance up to 20,000 cycles, low cycle-to-cycle variation, and robust thermal stability up to 120 °C. The resistive switching is attributed to the ferroelectric polarization-modulated thermal emission accompanied by the Fowler-Nordheim tunneling across the interfaces. First-principles calculations reveal that the good device performances are associated with the exceptionally strong ferroelectric polarization in CuCrP2S6 crystal. Furthermore, the typical biological synaptic learning rules, such as long-term potentiation/depression and spike amplitude/spike time-dependent plasticity, are also demonstrated. The results highlight the great application potential of van der Waals antiferroelectrics in high-performance synaptic devices for neuromorphic computing.

Current-Limited Conductive Atomic Force Microscopy.

Conductive atomic force microscopy (CAFM) has become the preferred tool of many companies and academics to analyze the electronic properties of materials and devices at the nanoscale. This technique scans the surface of a sample using an ultrasharp conductive nanoprobe so that the contact area between them is very small (<100 nm2) and it can measure the properties of the sample with a very high lateral resolution. However, measuring relatively low currents (∼1 nA) in such small areas produces high current densities (∼1000 A/cm2), which almost always results in fast nanoprobe degradation. That is not only expensive but also endangers the reliability of the data collected because detecting which data sets are affected by tip degradation can be complex. Here, we show an inexpensive long-sought solution for this problem by using a current limitation system. We test its performance by measuring the tunneling current across a reference ultrathin dielectric when applying ramped voltage stresses at hundreds of randomly selected locations of its surface, and we conclude that the use of a current limitation system increases the lifetime of the tips by a factor of ∼50. Our work contributes to significantly enhance the reliability of one of the most important characterization techniques in the field of nanoelectronics.

Inkjet-printed h-BN memristors for hardware security.

Inkjet printing electronics is a growing market that reached 7.8 billion USD in 2020 and that is expected to grow to ∼23 billion USD by 2026, driven by applications like displays, photovoltaics, lighting, and radiofrequency identification. Incorporating two-dimensional (2D) materials into this technology could further enhance the properties of the existing devices and/or circuits, as well as enable the development of new concept applications. Along these lines, here we report an easy and cheap process to synthesize inks made of multilayer hexagonal boron nitride (h-BN)-an insulating 2D layered material-by the liquid-phase exfoliation method and use them to fabricate memristors. The devices exhibit multiple stochastic phenomena that are very attractive for use as entropy sources in electronic circuits for data encryption (physical unclonable functions [PUFs], true random number generators [TRNGs]), such as: (i) a very disperse initial resistance and dielectric breakdown voltage, (ii) volatile unipolar and non-volatile bipolar resistive switching (RS) with a high cycle-to-cycle variability of the state resistances, and (iii) random telegraph noise (RTN) current fluctuations. The clue for the observation of these stochastic phenomena resides on the unpredictable nature of the device structure derived from the inkjet printing process (i.e., thickness fluctuations, random flake orientations), which allows fabricating electronic devices with different electronic properties. The easy-to-make and cheap memristors here developed are ideal to encrypt the information produced by multiple types of objects and/or products, and the versatility of the inkjet printing method, which allows effortless deposition on any substrate, makes our devices especially attractive for flexible and wearable devices within the internet-of-things.

Hybrid 2D-CMOS microchips for memristive applications.

Exploiting the excellent electronic properties of two-dimensional (2D) materials to fabricate advanced electronic circuits is a major goal for the semiconductor industry1,2. However, most studies in this field have been limited to the fabrication and characterization of isolated large (more than 1 µm2) devices on unfunctional SiO2-Si substrates. Some studies have integrated monolayer graphene on silicon microchips as a large-area (more than 500 µm2) interconnection3 and as a channel of large transistors (roughly 16.5 µm2) (refs. 4,5), but in all cases the integration density was low, no computation was demonstrated and manipulating monolayer 2D materials was challenging because native pinholes and cracks during transfer increase variability and reduce yield. Here, we present the fabrication of high-integration-density 2D-CMOS hybrid microchips for memristive applications-CMOS stands for complementary metal-oxide-semiconductor. We transfer a sheet of multilayer hexagonal boron nitride onto the back-end-of-line interconnections of silicon microchips containing CMOS transistors of the 180 nm node, and finalize the circuits by patterning the top electrodes and interconnections. The CMOS transistors provide outstanding control over the currents across the hexagonal boron nitride memristors, which allows us to achieve endurances of roughly 5 million cycles in memristors as small as 0.053 µm2. We demonstrate in-memory computation by constructing logic gates, and measure spike-timing dependent plasticity signals that are suitable for the implementation of spiking neural networks. The high performance and the relatively-high technology readiness level achieved represent a notable advance towards the integration of 2D materials in microelectronic products and memristive applications.

Hardware implementation of a true random number generator integrating a hexagonal boron nitride memristor with a commercial microcontroller.

The development of the internet-of-things requires cheap, light, small and reliable true random number generator (TRNG) circuits to encrypt the data-generated by objects or humans-before transmitting them. However, all current solutions consume too much power and require a relatively large battery, hindering the integration of TRNG circuits on most objects. Here we fabricated a TRNG circuit by exploiting stable random telegraph noise (RTN) current signals produced by memristors made of two-dimensional (2D) multi-layered hexagonal boron nitride (h-BN) grown by chemical vapor deposition and coupled with inkjet-printed Ag electrodes. When biased at small constant voltages (≤70 mV), the Ag/h-BN/Ag memristors exhibit RTN signals with very low power consumption (∼5.25 nW) and a relatively high current on/off ratio (∼2) for long periods (>1 hour). We constructed TRNG circuits connecting an h-BN memristor to a small, light and cheap commercial microcontroller, producing a highly-stochastic, high-throughput signal (up to 7.8 Mbit s-1) even if the RTN at the input gets interrupted for long times up to 20 s, and if the stochasticity of the RTN signal is reduced. Our study presents the first full hardware implementation of 2D-material-based TRNGs, enabled by the unique stability and figures of merit of the RTN signals in h-BN based memristors.

Standards for the Characterization of Endurance in Resistive Switching Devices.

Resistive switching (RS) devices are emerging electronic components that could have applications in multiple types of integrated circuits, including electronic memories, true random number generators, radiofrequency switches, neuromorphic vision sensors, and artificial neural networks. The main factor hindering the massive employment of RS devices in commercial circuits is related to variability and reliability issues, which are usually evaluated through switching endurance tests. However, we note that most studies that claimed high endurances >106 cycles were based on resistance versus cycle plots that contain very few data points (in many cases even <20), and which are collected in only one device. We recommend not to use such a characterization method because it is highly inaccurate and unreliable (i.e., it cannot reliably demonstrate that the device effectively switches in every cycle and it ignores cycle-to-cycle and device-to-device variability). This has created a blurry vision of the real performance of RS devices and in many cases has exaggerated their potential. This article proposes and describes a method for the correct characterization of switching endurance in RS devices; this method aims to construct endurance plots showing one data point per cycle and resistive state and combine data from multiple devices. Adopting this recommended method should result in more reliable literature in the field of RS technologies, which should accelerate their integration in commercial products.